Intel® Quartus® Prime Pro Edition User Guide: Platform Designer

ID 683609
Date 10/04/2021
Public

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5.5.1.1.2. HSSI Serial Clock Sink

The HSSI Serial Clock interface includes a sink in the End direction.

You can instantiate the HSSI Serial Clock Sink interface in the _hw.tcl file as:

add_interface <name> hssi_serial_clock end

You can connect the HSSI Serial Clock Sink interface to a single HSSI Serial Clock Source interface; you cannot connect it to multiple sources. This Interface has a single clk port role limited to a 1 bit width, and a clockRate parameter, which is the frequency of the clock driven by the HSSI Serial Clock Source interface.

An unconnected and unexported HSSI Serial Sink is invalid and generates error messages.

Table 78.  HSSI Serial Clock Sink Port Roles
Name Direction Width Description
clk Output 1

A single bit wide port role, which provides synchronization for internal logic

Table 79.  HSSI Serial Clock Sink Parameters
Name Type Default Derived Description
clockRate long 0

No

The frequency of the clock driven by the HSSI Serial Clock Source interface. When you specify a clockRate greater than 0, then this interface can be driven only at that rate.