Intel® Quartus® Prime Pro Edition User Guide: Platform Designer

ID 683609
Date 10/04/2021
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

6.4.1.2. Avalon® Data Pattern Generator IP Control and Status Interface

The control and status interface of the Avalon® Data Pattern Generator IP is a 32-bit Avalon® memory mapped agent that allows you to enable or disable the data generation, as well as set the throttle. This interface also provides generation-time information, such as the number of channels and whether data packets are supported.