AN 901: Implementing Analog-to-Digital Converter Dual Link Design with Intel® Agilex™ FPGA E-Tile JESD204C RX IP

ID 683537
Date 9/21/2020
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1.5. Document Revision History for AN 901: Implementing Analog-to-Digital Converter Dual Link Design with Intel® Agilex™ FPGA E-Tile JESD204C RX IP

Document Version Changes
2020.09.21 Initial release.

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