AN 901: Implementing Analog-to-Digital Converter Dual Link Design with Intel Agilex® 7 FPGA E-Tile JESD204C RX IP

ID 683537
Date 3/26/2023
Public
Document Table of Contents

1.5. Document Revision History for AN 901: Implementing Analog-to-Digital Converter Dual Link Design with Intel Agilex® 7 FPGA E-Tile JESD204C RX IP

Document Version Changes
2023.03.26 Updated product family name to "Intel Agilex® 7".
2020.09.21 Initial release.