Arria® 10 FPGA Development Kit User Guide

ID 683526
Date 5/15/2024
Document Table of Contents

5. Board Update Portal

The Arria® 10 GX FPGA Development Kit ships with the Board Update Portal design example stored in the factory portion of the flash memory. The design consists of a Nios II embedded processor, an Ethernet MAC, and an HTML web server.

When you power up the board with SW6.4 FACTORY_LOAD in the default position, the Arria® 10 GX FPGA configures with the Board Update Portal design example. The design can obtain an IP address from any DHCP server and serve a web page from the flash on your board to any host computer on the same network. The web page allows you to upload new FPGA designs to the user portion of the flash memory and provides links to useful information on the Intel® website, including kit-specific links and design resources.

After successfully updating the user flash memory, you can load the user design from the flash memory into the FPGA. To do so, set SW6.4 to OFF position and power cycle the board.

The source code for the Board Update Portal design resides in the <package dir>\examples\board_update_portal directory. If the Board Update Portal is corrupted or deleted from the flash memory, refer to the “Factory Reset” section for information on how to restore the boards original factory contents.