4.4.12. The Clock Controller
The Clock Controller application set the three programmable oscillators to any frequency between 10 MHz and 810 MHz. The frequencies support eight digits of precision to the right of the decimal point.
The Clock Controller communicates with the MAX® V device on the board through the JTAG bus. The programmable oscillators are connected to the MAX® V device through a 2-wire serial bus.
To start the application, click the Clock icon in the Board Test System application.
Figure 31. Si570 (X3) Tab
| Control | Description |
|---|---|
| Serial Port Registers | Shows the current values from the Si570 registers for frequency configuration. |
| Target Frequency | Allows you to specify the frequency (in MHz) of the clock. Legal values are between 10 and 810 MHz with eight digits of precision to the right of the decimal point. For example, 421.31259873 is possible within 100 parts per million (ppm). The Target Frequency control works in conjunction with the Set control. |
| fXTAL | Shows the calculated internal fixed-frequency crystal, based on the serial port register values. |
| Default | Sets the frequency for the oscillator associated with the active tab back to its default value. This can also be accomplished by power cycling the board. |
| Set | Sets the programmable oscillator frequency for the selected clock to the value in the Target Frequency control for the programmable oscillators. Frequency changes might take several milliseconds to take effect. You might see glitches on the clock during this time. Altera recommends resetting the FPGA logic after changing frequencies. |
Each Si5338 tab for U26 and U14 display the same GUI controls for each clock generators. Each tab allows for separate control. The Si5338 is capable of synthesizing four independent user-programmable clock frequencies up to 350 MHz and select frequencies up to 710 MHz.
Figure 32. Si5338 (U26) Tab
Figure 33. Si5338 (U14) Tab
| Control | Description |
|---|---|
| F_vco | Displays the generating signal value of the voltage-controlled oscillator. |
| Register | Display the current frequencies for each oscillator. |
| Frequency (MHz) | Allows you to specify the frequency of the clock. |
| Disable All | Disable all oscillators at once. |
| Read | Reads the current frequency setting for the oscillator associated with the active tab. |
| Default | Sets the frequency for the oscillator associated with the active tab back to its default value. This can also be accomplished by power cycling the board. |
| Set | Sets the programmable oscillator frequency for the selected clock to the value in the CLK0 to CLK3 controls for the Si5338 (U26 and U14). Frequency changes might take several milliseconds to take effect. You might see glitches on the clock during this time. Altera recommends resetting the FPGA logic after changing frequencies. |
| Import | Import register map file generated from the Silicon Laboratories Clockbuilder Desktop. |