Multi Channel DMA for PCI Express* Intel® FPGA IP Design Example User Guide

ID 683517
Date 9/15/2021

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Document Table of Contents Run the Reference Example Application

  1. Build the reference application.

    $ cd cli/perfq_app/

    $ make clean && make all

    $ ./perfq_app -h

  2. This command displays the available options in the application, as shown in the image below:

    Refer to the README file located in the cli/perfq_app directory for more information.

  3. Do a PIO test to check if the setup is correct. If successful, the application displays a Pass status as shown in the image below:
    Here the -b option should be provided with the correct BDF in the system.
  4. Perform IP reset.

    This step will perform an IP Reset. You can perform this step before every run.

    Build devmem utility:

    $ software/user/cli/devmem

    $ make clean all

    $ ./devmem 0000:01:00.0 0 0x00200120 0x1

  5. Example of testing a loopback design with the following configuration:

    Command: $ ./perfq_app -b 0000:01:00.0 -p 32768 -l 5 -i -c 2 -d 2 -a 4


    1. BDF (-b 0000:01:00.0)
    2. 2 channels (-c 2)
    3. Loopback (-i)
    4. Payload length of 64 bytes in each descriptor (-p 32768)
    5. Time Limit (-l 5)
    6. Debug log enabled (-d 2)
    7. One thread per queue (-a 4)
    Note: This hardware test was run with the Intel® Stratix® 10 GX H-tile PCIe Gen3 x16 configuration.

If you are testing with 128 and 256 channels, define the following flag in examples/mcdma-test/perfq/Makefile

__cflags += -DIFC_MCDMA_FUNC_VER
  1. Verify with 508 batch size.
  2. Pass batch size as extra parameter (-x 508).
Example Command:
./perfq_app -b 0000:01:00.0 -p 64 -i -l 5\
 -c 256 -d 1 -a 8 -x 508
Note: Execute the following command for MSIX:
$ulimit -n 8192

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