Intel® Stratix® 10 TX Device Errata

ID 683470
Date 7/21/2022
Document Table of Contents

3.15. 852521: A64 Unconditional Branch May Jump to Incorrect Address


When executing in AArch64 state with address translation disabled, unconditional immediate branch instructions might jump to an incorrect address.

The following conditions are required for this erratum to occur:

  1. The processor is executing in AArch64 state.
  2. The SCTLR_ELx.M bit for the current exception level is 0.
  3. The HCR_EL2.VM bit is 0.
  4. A B or BL instruction from the unconditional branch (immediate) encoding class is executed.
  5. This branch has an imm26 field of 0x1FFFFFF, encoding a branch target of {pc}+0x7FFFFFC.


If these conditions are met, then the processor might incorrectly branch to the target {pc}-0x8000004 instead of {pc}+0x7FFFFFC.


The workaround for this erratum is to avoid the conditions described.


Category 3