Intel® Stratix® 10 TX Device Errata

ID 683470
Date 7/21/2022
Public
Document Table of Contents

3.3. 855871: ETM Does Not Report IDLE State When Disabled Using OSLOCK

Description

The OS Lock feature in the Embedded Trace Macrocell (ETM) allows software running on the Cortex-A53 MPCore* to disable external debug access and save the register state before powering down the ETM. Software must follow a defined sequence to ensure that the register state is stable and all trace data is output before the system is powered-down. Because of this erratum, when the OS Lock mechanism is used, the ETM never indicates to software that it is safe to be powered-off. This erratum occurs when:
  • The ETM is enabled (TRCPRGCTLR.EN = 1)
  • The OS Lock feature disables the ETM (TRCOSLAR.OSLK = 1)

Impact

When the OS lock feature is enabled and software polls TRCSTATR.IDLE, it remains high even after the ETM is disabled and drained of trace data. If the ETM is already disabled by clearing the TRCPRGCTLR.EN bit then a software save and restore sequence behaves correctly.

Workaround

To execute the disable sequence properly:
  1. Disable the ETM by setting the TRCOSLAR.OSLK bit.
  2. Save the state of the TRCPRGCTLR.EN bit.
  3. Clear the TRCPRGCTLR.EN bit.

Category

Category 2

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