AN 556: Using the Design Security Features in Intel FPGAs

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ID 683269
Date 5/21/2021
Public
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Serial Flash Loader Support with Encryption Enabled

Intel® provides an in-system programming (ISP) solution for serial configuration devices: the Serial Flash Loader Intel® FPGA IP core. You can instantiate the serial flash loader (SFL) block in your design to provide the flexibility to update the design stored in the serial configuration device without reprogramming the configuration device through the AS interface.

As long as the JTAG interface of the FPGA is accessible, you can use the SFL solution for your application. If the design security feature with tamper-protection bit is set, the SFL solution does not work. Although the JTAG programming is not supported when the tamper-protection bit is set, you may instantiate the Serial Flash Loader IP core in your design and execute the SFL programming for the first time before non-volatile key programming with the tamper-protection bit is set in the FPGA.

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