AN 556: Using the Design Security Features in Intel FPGAs

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ID 683269
Date 5/21/2021
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LOCK and UNLOCK JTAG Instructions

When you configure this reference design into an Arria V device with the tamper-protection bit enabled, the Arria V device is in JTAG secure mode after power up and configuration, whereby you can only execute mandatory JTAG instructions.

To disable the JTAG secure mode, you can trigger the start_unlock port of the user logic to issue the UNLOCK JTAG instruction. After the start_unlock port goes high, the UNLOCK JTAG instruction is issued. After the UNLOCK JTAG instruction is issued, the device exits from JTAG secure mode, whereby both mandatory and non-mandatory JTAG instructions are allowed.

Figure 4.  LOCK or UNLOCK JTAG Instruction Execution


The start_lock port in the user logic triggers the execution of the LOCK JTAG instruction. The function of the LOCK JTAG instruction is to put the device back into JTAG secure mode.

Table 21.  Input and Output Port of the User Logic
Port Input/Output Function
clk_in Input Clock source for the user logic. The fMAX of the user logic depends on the timing closure analysis. You need to apply timing constraints and perform timing analysis on the path to determine the fMAX .
start_lock Input Logic high to trigger the execution of the LOCK JTAG instruction to the internal JTAG interface.
start_unlock Input Logic high to trigger the execution of the UNLOCK JTAG instruction to the internal JTAG interface.
jtag_core_en_out Output Output of the User_logic_control_block. This port is connected to the corectl port of the JTAG WYSIWYG atom to enable the internal JTAG interface.
tck_out Output Output of the User_logic_control_block. This port is connected to the tck_core port of the JTAG WYSIWYG atom.
tdi_out Output Output of the User_logic_control_block. This port is connected to the tdi_core port of the JTAG WYSIWYG atom.
tms_out Output Output of the User_logic_control_block. This port is connected to the tms_core port of the JTAG WYSIWYG atom.
indicator Output Logic high on this output pin indicates the completion of the LOCK or UNLOCK JTAG instruction execution.

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