Embedded Memory (RAM: 1-PORT, RAM: 2-PORT, ROM: 1-PORT, and ROM: 2-PORT) User Guide

ID 683240
Date 9/17/2021
Document Table of Contents
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6.1.2. Simulating the Design

To simulate the design in the ModelSim* - Intel® FPGA Edition software, follow these steps:

  1. Unzip the Internal_Memory_DesignExample.zip file to any working directory on your PC.
  2. Start the ModelSim* - Intel® FPGA Edition software.
  3. On the File menu, click Change Directory.
  4. Select the folder in which you unzipped the files.
  5. Click OK.
  6. On the Tools menu, point to TCL and click Execute Macro. The Execute Do File dialog box appears.
  7. Select the true_dp.do file and click Open. The true_dp.do file is a script file that automates all the necessary settings, compiles and simulates the design files, and displays the simulation waveform.
  8. Verify the result shown in the Waveform Viewer window.
You can rearrange signals, remove signals, add signals, and change the radix by modifying the script in true_dp.do accordingly.