2. Embedded Memory IP Cores Getting Started
This chapter provides a general overview of the Intel® FPGA IP core design flow to help you quickly get started with the Embedded Memory IP cores. The Intel® FPGA IP Library is installed as part of the Intel® Quartus® Prime software installation process. You can select and parameterize any Intel® FPGA IP core from the library. Intel provides an integrated parameter editor that allows you to customize the Embedded Memory IP cores to support a wide variety of applications. The parameter editor guides you through the setting of parameter values and selection of optional ports.