Intel® Quartus® Prime Pro Edition User Guide: Design Compilation

ID 683236
Date 10/02/2023

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3.2.3. Using Block-Based Compilation

During the design process, when making minor modifications to a design, recompiling the entire design can result in longer compilation times than anticipated.
This is because every time you recompile a design following a change, the compiler may apply global optimizations to enhance resource utilization and timing performance, thus extending the compilation time. By employing a block-based flow in the Intel® Quartus® Prime Pro Edition software, you can isolate functional blocks that meet placement and timing requirements from others still undergoing change and optimization. By isolating functional blocks into partitions, the results and performance of unaltered logic within a design are maintained so you can apply optimization techniques to selected areas and only compile those areas. This approach can significantly diminish design compilation time, enabling several iterations per day and facilitating more efficient achievement of timing closure.

When using block-based compilation, you can enable the Fast Preserve option, which masks the partition netlist during the fitter initialization to use only the logic that interfaces with the rest of the design present at the partition boundary during compilation. By implementing this approach, the time required for the compiler to perform synthesis, place, route, and partition is effectively reduced. Consequently, the overall compilation process becomes more efficient, enabling faster generation of the necessary configurations for the partition. This reduction in compilation time allows for quicker iterations and facilitates the timely completion of the design implementation phase.

To create partitions dividing functional blocks:
  1. In the Design Partition Planner, identify blocks of a size suitable for partitioning.
    A partition generally represents roughly 15 to 20% of the total design size. You should use the information area below the bar at the top of each entity.
    Figure 140. Entity representation in the Design Partition Planner
  2. Extract and collapse entities as necessary to achieve stand-alone blocks.
  3. For each entity of the desired size containing related blocks of logic, right-click the entity and click Create Design Partition to place that entity in its own partition.
    The goal is to achieve partitions containing related blocks of logic.
  4. To enable the Fast Preserve option that simplifies the logic of the preserved partition to only interface logic during compilation, click Assignments > Settings > Compiler Settings > Incremental Compile > Fast Preserve.
Intel® recommends consulting the Intel® Quartus® Prime Pro Edition User Guide: Block-Based Design to gain in-depth knowledge about block-based designs. This guide serves as a comprehensive resource that provides detailed information, instructions, and explanations related to the Intel® Quartus® Prime Pro Edition software.