50G Interlaken MegaCore Function User Guide

ID 683217
Date 9/20/2022

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Document Table of Contents 50G Interlaken IP Core RX PCS

RX PCS logic is an embedded hard macro and does not consume FPGA soft logic elements.

The 50G Interlaken IP core RX PCS block performs the following functions to retrieve the data:

  • Detects word lock and word synchronization.
  • Checks running disparity.
  • Reverses gearboxing and 64/67B encoding.
  • Descrambles the data.
  • Delineates meta frame boundaries.
  • Performs CRC32 checking.
  • Sends lane status information to the calendar and status blocks.