FIR II IP Core: User Guide

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ID 683208
Date 6/12/2020
Public
Document Table of Contents

1. About the FIR II IP Core

Updated for:
Intel® Quartus® Prime Design Suite 17.1
The Altera® FIR II IP core provides a fully-integrated finite impulse response (FIR) filter function optimized for use with Intel FPGA devices. The II IP core has an interactive parameter editor that allows you to easily create custom FIR filters. The parameter editor outputs IP functional simulation model files for use with Verilog HDL and VHDL simulators.

You can use the parameter editor to implement a variety of filter types, including single rate, decimation, interpolation, and fractional rate filters.

Many digital systems use signal filtering to remove unwanted noise, to provide spectral shaping, or to perform signal detection or analysis. FIR filters and infinite impulse response (IIR) filters provide these functions. Typical filter applications include signal preconditioning, band selection, and low-pass filtering.

Figure 1. Basic FIR Filter with Weighted Tapped Delay Line

To design a filter, identify coefficients that match the frequency response you specify for the system. These coefficients determine the response of the filter. You can change which signal frequencies pass through the filter by changing the coefficient values in the parameter editor.

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