FIR II IP Intel® FPGA IP: User Guide

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ID 683208
Date 4/15/2024
Public
Document Table of Contents
Document Table of Contents x
1. About the FIR II IP Intel® FPGA IP 2. FIR II IP Getting Started 3. FIR II IP Parameters 4. FIR II IP Functional Description 5. Document Revision History for the FIR II IP User Guide A. FIR II IP Core Document Archive
1. About the FIR II IP Intel® FPGA IP x
1.1. DSP Intel® FPGA IP Features 1.2. FIR II IP Core Features 1.3. FIR II IP Device Support 1.4. DSP Intel® FPGA IP Verification 1.5. FIR II IP Release Information 1.6. FIR II IP Core Performance and Resource Utilization
2. FIR II IP Getting Started x
2.1. Installing and Licensing Intel® FPGA IP Cores 2.2. IP Catalog and Parameter Editor 2.3. Specifying the IP Parameters and Options ( Quartus® Prime Pro Edition) 2.4. Simulating Intel® FPGA IP Cores 2.5. Simulating the FIR II IP Testbench in MATLAB 2.6. DSP Builder Design Flow
2.1. Installing and Licensing Intel® FPGA IP Cores x
2.1.1. Intel® FPGA IP Evaluation Mode 2.1.2. FIR II IP Core Intel® FPGA IP Evaluation Mode Timeout Behavior
2.3. Specifying the IP Parameters and Options ( Quartus® Prime Pro Edition) x
2.3.1. IP Core Generation Output ( Quartus® Prime Pro Edition)
3. FIR II IP Parameters x
3.1. FIR II IP Core Filter Specification 3.2. FIR II IP Core Coefficient Settings 3.3. FIR II IP Core Coefficients 3.4. FIR II IP Core Input and Output Options 3.5. FIR II IP Core Implementation Options 3.6. FIR II IP Core Reconfigurability
3.3. FIR II IP Core Coefficients x
3.3.1. Loading Coefficients from a File
3.4. FIR II IP Core Input and Output Options x
3.4.1. Signed Fractional Binary 3.4.2. MSB and LSB Truncation, Saturation, and Rounding
3.5. FIR II IP Core Implementation Options x
3.5.1. Memory and Multiplier Trade-Offs
3.5.1. Memory and Multiplier Trade-Offs x
3.5.1.1. Using Memory Block Threshold 3.5.1.2. Using Dual-port RAM Threshold 3.5.1.3. Using Large RAM Threshold 3.5.1.4. Using Hard Multiplier Threshold
4. FIR II IP Functional Description x
4.1. FIR II IP Core Interpolation Filters 4.2. FIR Decimation Filters 4.3. FIR II IP Time-Division Multiplexing 4.4. FIR II IP Core Multichannel Operation 4.5. FIR II IP Multiple Coefficient Banks 4.6. FIR II IP Coefficient Reloading 4.7. Reconfigurable FIR Filters 4.8. FIR II IP Core Interfaces and Signals
4.4. FIR II IP Core Multichannel Operation x
4.4.1. Vectorized Inputs 4.4.2. Channelization 4.4.3. Channel Input and Output Format
4.4.3. Channel Input and Output Format x
4.4.3.1. Eight Channels on Three Wires 4.4.3.2. Four Channels on Four Wires 4.4.3.3. 15 Channels with 15 Valid Cycles and 17 Invalid Cycles 4.4.3.4. 22 Channels with 11 Valid Cycles and 9 Invalid Cycles 4.4.3.5. Super Sample Rate
4.8. FIR II IP Core Interfaces and Signals x
4.8.1. Avalon Streaming Interfaces in DSP Intel FPGA IP 4.8.2. FIR II IP Core Avalon-ST Interfaces 4.8.3. FIR II IP Signals 4.8.4. FIR Filter Reset
4.8.2. FIR II IP Core Avalon-ST Interfaces x
4.8.2.1. Avalon-ST Sink Interface 4.8.2.2. Avalon-ST Source Interface
4.8.2.1. Avalon-ST Sink Interface x
4.8.2.1.1. Single Channel on Single Wire 4.8.2.1.2. Multiple Channels on Single Wire 4.8.2.1.3. Multiple Channels on Multiple Wires
1. About the FIR II IP Intel® FPGA IP
2. FIR II IP Getting Started
3. FIR II IP Parameters
4. FIR II IP Functional Description
5. Document Revision History for the FIR II IP User Guide
A. FIR II IP Core Document Archive

1.6. FIR II IP Core Performance and Resource Utilization

Table 3.  FIR II IP Core Performance—Arria V DevicesTypical expected performance using the Quartus Prime software with Arria V (5AGXFB3H4F40C4).
Parameters ALM DSP Blocks Memory Registers fMAX (MHz)
Channel Wires Filter Type Coefficients M10K M20K Primary Secondary
8 2 Decimation — 1,607 24 0 — 1,232 64 308
8 2 Decimation Write 2,120 24 0 — 1,298 141 308
8 2 Fractional Rate — 1,395 16 0 — 2,074 99 281
8 2 Fractional Rate Write 1,745 16 0 — 2,171 91 282
8 2 Fractional Rate — 1,493 16 0 — 2,167 117 280
8 2 Fractional Rate Write 1,852 16 0 — 2,287 116 270
8 2 Interpolation — 1,841 32 0 — 2,429 52 282
8 2 Interpolation Write 1,994 32 0 — 2,826 41 278
8 2 Interpolation Multiple banks 2,001 32 0 — 2,737 74 279
8 2 Interpolation Multiple banks; Write 2,700 32 0 — 2,972 130 282
8 2 Single rate — 932 20 0 — 318 20 278
8 2 Single rate Write 1,057 20 0 — 713 3 279
8 1 Decimation — 329 3 1 — 321 33 301
8 1 Decimation Write 430 3 1 — 366 34 307
8 1 Decimation Multiple banks 395 3 3 — 483 44 310
8 1 Decimation Multiple banks; Write 510 3 3 — 472 40 291
8 1 Fractional Rate — 661 5 4 — 877 75 310
8 1 Fractional Rate Write 788 5 4 — 936 98 309
8 1 Interpolation — 381 5 0 — 442 32 278
8 1 Interpolation Write 514 5 0 — 540 27 278
8 1 Single Rate — 493 10 0 — 191 20 278
8 1 Single Rate Write 633 10 0 — 588 1 278
1 — Decimation — 220 3 0 — 158 27 310
1 super sample — Decimation — 404 20 0 — 400 41 305
1 super sample — Decimation Write 505 20 0 — 785 35 308
1 — Decimation Write 318 3 0 — 208 26 309
1 Half Band — Decimation — 234 3 0 — 192 34 308
1 Half Band — Decimation Write 320 3 0 — 232 27 309
1 — Fractional Rate — 297 3 0 — 504 57 310
1 — Fractional Rate Write 391 3 0 — 563 56 310
1 Half Band — Fractional Rate — 196 2 0 — 251 5 277
1 Half Band — Fractional Rate Write 266 2 0 — 301 15 280
1 — Interpolation — 266 5 0 — 290 30 278
1 super sample — Interpolation — 717 32 0 — 903 45 308
1 super sample — Interpolation Write 842 32 0 — 1,281 48 308
1 — Interpolation Write 405 5 0 — 380 15 278
1 Half Band — Interpolation — 254 3 0 — 293 8 310
1 Half Band — Interpolation Write 333 4 0 — 314 10 309
1 — Single rate — 93 10 0 — 129 27 299
1 super sample — Single rate — 262 20 0 — 307 41 309
1 super sample — Single rate Write 373 20 0 — 687 40 302
1 — Single rate Write 228 10 0 — 519 16 300
1 Half Band — Single rate — 189 5 0 — 254 63 309
1 Half Band — Single rate Write 272 5 0 — 496 29 310
1 — Single rate Multiple banks 109 10 0 — 199 29 283
1 — Single rate Multiple banks; Write 395 10 0 — 361 19 282
Table 4.  FIR II IP Core Performance—Cyclone V DevicesTypical expected performance using the Quartus Prime software with Cyclone V (5CGXFC7D6F31C6) devices.
Parameters ALM DSP Blocks Memory Registers fMAX (MHz)
Channel Wires Filter Type Coefficients M10K M20K Primary Secondary
8 2 Decimation — 1,607 24 0 — 1,231 46 273
8 2 Decimation Write 2,092 24 0 — 1,352 63 273
8 2 Fractional Rate — 1,852 16 0 — 3,551 309 254
8 2 Fractional Rate Write 2,203 16 0 — 3,675 269 255
8 2 Fractional Rate — 1,951 16 0 — 3,543 421 227
8 2 Fractional Rate Write 2,301 16 0 — 3,601 476 250
8 2 Interpolation — 1,840 32 0 — 2,431 48 255
8 2 Interpolation Write 1,988 32 0 — 2,813 57 252
8 2 Interpolation Multiple banks 2,006 32 0 — 2,711 98 253
8 2 Interpolation Multiple banks; Write 2,704 32 0 — 2,990 100 250
8 2 Single rate — 934 20 0 — 317 19 252
8 2 Single rate Write 1,053 20 0 — 704 12 251
8 1 Decimation — 474 3 1 — 541 50 275
8 1 Decimation Write 559 3 1 — 574 58 273
8 1 Decimation Multiple banks 544 3 3 — 691 83 275
8 1 Decimation Multiple banks; Write 636 3 3 — 677 82 275
8 1 Fractional Rate — 1,165 5 4 — 1,715 205 275
8 1 Fractional Rate Write 1,287 5 4 — 1,770 198 275
8 1 Interpolation — 381 5 0 — 433 42 248
8 1 Interpolation Write 513 5 0 — 540 26 250
8 1 Single Rate — 493 10 0 — 191 18 249
8 1 Single Rate Write 624 10 0 — 563 26 251
1 — Decimation — 219 3 0 — 159 23 289
1 super sample — Decimation — 404 20 0 — 398 43 288
1 super sample — Decimation Write 503 20 0 — 774 46 256
1 — Decimation Write 312 3 0 — 208 26 289
1 Half Band — Decimation — 234 3 0 — 192 29 289
1 Half Band — Decimation Write 323 3 0 — 228 32 288
1 — Fractional Rate — 422 3 0 — 723 94 310
1 — Fractional Rate Write 516 3 0 — 787 86 292
1 Half Band — Fractional Rate — 195 2 0 — 251 12 261
1 Half Band — Fractional Rate Write 267 2 0 — 299 15 252
1 — Interpolation — 262 5 0 — 296 25 252
1 super sample — Interpolation — 708 32 0 — 914 34 272
1 super sample — Interpolation Write 841 32 0 — 1,297 32 259
1 — Interpolation Write 400 5 0 — 382 12 258
1 Half Band — Interpolation — 288 3 0 — 456 13 290
1 Half Band — Interpolation Write 331 4 0 — 315 9 290
1 — Single rate — 87 10 0 — 142 14 253
1 super sample — Single rate — 258 20 0 — 315 33 260
1 super sample — Single rate Write 369 20 0 — 704 23 274
1 — Single rate Write 227 10 0 — 535 0 251
1 Half Band — Single rate — 187 5 0 — 273 44 288
1 Half Band — Single rate Write 274 5 0 — 506 19 275
1 — Single rate Multiple banks 110 10 0 — 187 41 255
1 — Single rate Multiple banks; Write 375 10 0 — 349 32 255
Table 5.  FIR II IP Core Performance—Stratix V DevicesTypical expected performance using the Quartus Prime software with Stratix V (5SGSMD4H2F35C2) devices.
Parameters ALM DSP Blocks Memory Registers fMAX (MHz)
Channel Wires Filter Type Coefficients M10K M20K Primary Secondary
8 2 Decimation — 1,609 24 — 0 1,231 60 450
8 2 Decimation Write 2,319 24 — 0 2,077 66 450
8 2 Fractional Rate — 1,350 16 — 0 2,099 88 448
8 2 Fractional Rate Write 1,771 16 — 0 2,291 78 450
8 2 Fractional Rate — 1,457 16 — 0 2,213 88 444
8 2 Fractional Rate Write 1,873 16 — 0 2,418 89 450
8 2 Interpolation — 1,777 32 — 0 2,303 15 444
8 2 Interpolation Write 2,081 32 — 0 3,009 26 450
8 2 Interpolation Multiple banks 1,825 32 — 0 2,473 39 430
8 2 Interpolation Multiple banks; Write 2,652 32 — 0 2,842 236 424
8 2 Single rate — 920 20 — 0 332 2 444
8 2 Single rate Write 1,359 20 — 0 1,323 1 450
8 1 Decimation — 340 3 — 0 324 25 450
8 1 Decimation Write 463 3 — 0 457 29 450
8 1 Decimation Multiple banks 466 3 — 0 569 42 450
8 1 Decimation Multiple banks; Write 577 3 — 0 567 41 450
8 1 Fractional Rate — 709 5 — 0 870 45 450
8 1 Fractional Rate Write 852 5 — 0 991 65 450
8 1 Interpolation — 216 5 — 0 197 13 450
8 1 Interpolation Write 361 5 — 0 290 22 450
8 1 Single Rate — 483 10 — 0 212 4 447
8 1 Single Rate Write 783 10 — 0 894 4 450
1 — Decimation — 215 3 — 0 175 10 450
1 super sample — Decimation — 547 20 — 0 1,167 88 450
1 super sample — Decimation Write 989 20 — 0 2,214 105 450
1 — Decimation Write 331 3 — 0 310 7 450
1 Half Band — Decimation — 226 3 — 0 206 16 450
1 Half Band — Decimation Write 343 3 — 0 327 18 450
1 — Fractional Rate — 252 3 — 0 318 21 445
1 — Fractional Rate Write 353 3 — 0 380 13 450
1 Half Band — Fractional Rate — 140 2 — 0 185 13 450
1 Half Band — Fractional Rate Write 214 2 — 0 235 21 450
1 — Interpolation — 168 5 — 0 127 19 450
1 super sample — Interpolation — 573 32 — 0 1,084 51 446
1 super sample — Interpolation Write 870 32 — 0 1,774 136 450
1 — Interpolation Write 313 5 — 0 196 5 450
1 Half Band — Interpolation — 253 3 — 0 292 9 450
1 Half Band — Interpolation Write 370 4 — 0 418 9 450
1 — Single rate — 226 10 — 0 706 31 447
1 _ssample — Single rate — 468 20 — 0 1,354 53 450
1 _ssample — Single rate Write 927 20 — 0 2,267 203 450
1 — Single rate Write 524 10 — 0 1,391 31 500
1 Half Band — Single rate — 195 5 — 0 270 50 450
1 Half Band — Single rate Write 351 5 — 0 645 28 450
1 — Single rate Multiple banks 250 10 — 0 716 93 449
1 — Single rate Multiple banks; Write 671 10 — 0 1,228 50 450
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