External Memory Interfaces Intel® Agilex™ FPGA IP Design Example User Guide

ID 683162
Date 6/21/2021
Public
Document Table of Contents

2.9. Generating a Design Example with the Calibration Debug Option

You can use the External Memory Interface (EMIF) Debug Toolkit to assist in debugging your external memory interface. The toolkit provides access to data collected by the Nios® II sequencer during memory calibration, and analysis tools to evaluate the stability of the calibrated interface.
The available task and analysis capabilities include the following:
  • Requesting calibration of the memory interface.
  • Reading probe data or writing source data to the In-System Sources and Probes (ISSPs) instances in the design.
  • Viewing the delay setting on any pin in the selected interface and changing it if necessary.
  • Rerunning the traffic generator in the design example.
  • Running driver margining on the interface.
  • Calibrating or changing termination settings.
  1. Navigate to the Diagnostics tab of the EMIF parameter editor.
  2. Click Intel® Quartus® Prime EMIF Debug Toolkit/On-Chip Debug Port > Add EMIF Debug Interface.
  3. If you are planning to use Driver Margining or ISSPs, ensure that the Enable In-System Sources and Probes option is enabled.
  4. After you have completed parameterizing your interface, click Generate Example Design.
The resulting generated design example has the debug toolkit enabled and all the necessary components connected as required for a single interface.

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