External Memory Interfaces Intel® Agilex™ FPGA IP Design Example User Guide

Download
ID 683162
Date 6/21/2021
Public
Document Table of Contents

2. Design Example Quick Start Guide for External Memory Interfaces Intel® Agilex™ FPGA IP

An automated design example flow is available for Intel® Agilex™ external memory interfaces.

The Generate Example Designs button on the Example Designs tab allows you to specify and generate the synthesis and simulation design example file sets which you can use to validate your EMIF IP.

You can generate a design example that matches the Intel FPGA development kit, or for any EMIF IP that you generate. You can use the design example to assist your evaluation, or as a starting point for your own system.

Figure 1. General Design Example Workflows

Did you find the information on this page useful?

Characters remaining:

Feedback Message