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2.1.2.1. Specify Instance-Specific Constraints in Assignment Editor
2.1.2.2. Specify NoC Constraints in NoC Assignment Editor
2.1.2.3. Specify I/O Constraints in Pin Planner
2.1.2.4. Plan Interface Constraints in Interface Planner and Tile Interface Planner
2.1.2.5. Adjust Constraints with the Chip Planner
2.1.2.6. Constraining Designs with the Design Partition Planner
4.2.1. Assigning to Exclusive Pin Groups
4.2.2. Assigning Slew Rate and Drive Strength
4.2.3. Assigning I/O Banks
4.2.4. Changing Pin Planner Highlight Colors
4.2.5. Showing I/O Lanes
4.2.6. Assigning Differential Pins
4.2.7. Entering Pin Assignments with Tcl Commands
4.2.8. Entering Pin Assignments in HDL Code
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2.2.2. Assigning a Pin
To assign a signal to a pin or device location, use the Tcl command shown in this example:
set_location_assignment -to <signal name> <location>
Valid locations are pin location names. Some device families also support edge and I/O bank locations. Edge locations are EDGE_BOTTOM, EDGE_LEFT, EDGE_TOP, and EDGE_RIGHT. I/O bank locations include IOBANK_1 to IOBANK_n, where n is the number of I/O banks in a device.