Intel® Quartus® Prime Pro Edition User Guide: Design Constraints

ID 683143
Date 4/03/2023
Document Table of Contents Specify NoC Constraints in NoC Assignment Editor

For designs targeting Intel Agilex® 7 M-Series FPGAs only, the NoC Assignment Editor in the Intel® Quartus® Prime Pro Edition software allows you to make logical assignments for hard memory NoC-related blocks in your design. These assignments include grouping, connectivity, address mapping, and bandwidth requirements.

The Hard Memory NoC facilitates high-bandwidth data movement between the FPGA core logic and memory resources, such as HBM2e and DDR5 memories. Refer to Interface Planner NoC Tool Flow and the Intel Agilex 7 M-Series FPGA Network-on-Chip (NoC) User Guide for details on the complete NoC flow including Interface Planner.

You use the NoC Assignment Editor to specify logical assignments for the NoC-related IP in your design. In the Platform Designer flow for specifying NoC connectivity and addressing, you define NoC connectivity and addressing within Platform Designer, but you still define performance targets, such as required bandwidth, in the NoC Assignment Editor after running Analysis & Synthesis.

Figure 2. Network on Chip (NoC) Assignment Editor Group Tab

Using the NoC Assignment Editor is similar to using the Assignment Editor, but the NoC Assignment Editor is optimized for making NoC assignments only. You must successfully complete Intel® Quartus® Prime Analysis & Elaboration before using the NoC Assignment Editor. After Analysis & Elaboration, you can access the NoC Assignment Editor by clicking Assignments > Network on Chip (NoC) Assignment Editor.

Specify assignments on the following NoC Assignment Editor tabs:

  • Group tab—specifies the Group Name of the NoC initiators and targets.
  • Connection tab—specifies the connections between NoC initiators and targets or SSM elements.
  • Attributes tab—specifies address mapping, bandwidth requirements, and transaction sizes for each connection.

The tabs are appear in order of priority. The assignments made on the Group tab affect the assignments available in the Connection tab. The assignments made on the Connection tab affect the assignments available in the Attributes tab.

Complete the assignments on each tab in order before moving to the next tab.

After making assignments in the NoC Assignment Editor, you click Validate to validate the assignments, and then click Save to store the assignments in the Intel® Quartus® Prime settings file (.qsf).

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