Nios® II Flash Programmer User Guide

ID 683118
Date 11/06/2017
Public
Document Table of Contents

2.4. Setting the Hardware Connection

This section describes how to select the correct download cable, device, and processor to program flash memory. If your system has only a single download cable and a single processor, the process is simple. This section describes all the steps for a system with multiple download cables, processors, and devices.

Before you can program flash memory on your board, you must configure your FPGA with a flash programmer target design that contains at least the minimum component set specified in the "Minimum Component Set for the Flash Programmer Target Design" table in the "Flash Programmer Target Design" chapter.

Note: For instructions to configure the FPGA, refer to the " Intel® Quartus® Prime Programmer" chapter in volume 3 of the Intel® Quartus® Prime Handbook.

After you load the target design on your FPGA, you can set the hardware connection for programming flash memory.

To set the Hardware Connection, perform the following steps:

  1. Click Hardware Connections. The Hardware Connections dialog box appears.
  2. In the Hardware Connections dialog box, click Refresh Connections.
  3. If you are reusing an .flash-settings file, and the Intel® Quartus® Prime project has been recompiled since the .flash-settings file was created or the Name column entries in the Processors list are blank, perform the following steps:
    1. Under JTAG Debugging Information File name, browse to locate your project JTAG Debugging Information File (.jdi).
    2. Click Resolve Names. The flash programmer uses the .jdi file to ensure the available connection information is accurate.
  4. If your design has multiple download cables, select the appropriate cable.
  5. If your design has multiple processors, select the Nios® II processor that corresponds to the CPU to program flash value under Target hardware information in the Nios® II Flash Programmer dialog box.
  6. Click Close.

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