Introduction to Intel® FPGA IP Cores

ID 683102
Date 4/03/2023
Document Table of Contents

1.9.2. Supported Simulation Flows

The Intel® Quartus® Prime software supports scripted and specialized simulation flows.
Table 9.  Simulation Flows
Simulation Flow Description
Scripted Simulation Flows Scripted simulation supports custom control of all aspects of simulation, such as custom compilation commands, or multipass simulation flows. Use a version-independent top-level simulation script that sources Intel® Quartus® Prime-generated IP simulation setup scripts. The Intel® Quartus® Prime software can generate a combined simulator setup script for all IP cores, for each supported simulator.
NativeLink Simulation Flow NativeLink automates Intel® Quartus® Prime integration with your EDA simulator. Setup NativeLink to generate simulation scripts, compile simulation libraries, and automatically launch your simulator following design compilation. Specify your own compilation, elaboration, and simulation scripts for testbench and simulation model files. Do not use NativeLink if you require direct control over every aspect of simulation.
Note: The Intel® Quartus® Prime Pro Edition software does not support NativeLink simulation.
Specialized Simulation Flows Specialized simulation flows support various design scenarios:
  • For simulation of example designs, refer to the example design pr IP documentation.
  • For simulation of Platform Designer designs, refer to Simulating Platform Designer (Standard) Systems in Intel® Quartus® Prime Pro Edition User Guide: Platform Designer .
  • For simulation of the Nios® II processor, refer to AN 351: Simulating Nios® II Embedded Processor Designs.