Intel® Quartus® Prime Timing Analyzer Cookbook

ID 683081
Date 7/21/2022

Clock Multiplexing

With clock multiplexing, you can select from two or more clocks with the create_clock and set_clock_groups constraints.
Figure 7. Constraints for a Typical 2:1 Clock Multiplexer

Clock Multiplexer Constraints

#Create the first input clock clkA to the mux
create_clock -period 10.000 -name clkA [get_ports {clkA}]
#Create the second input clock clkB to the mux
create_clock -period 20.000 -name clkB [get_ports {clkB}]
#Cut paths between clkA and clkB
set_clock_groups 	-exclusive 	-group {clkA} 	-group {clkB}