AN 1007: Partial Reconfiguration Design Simulation Tutorial

ID 819958
Date 5/17/2024
Public

9.5. Step 5: Generating Gate-level PR Simulation Models for the Persona

Use the PR mode of Intel Quartus Prime EDA Netlist Writer through the command line to create the simulation model for a PR persona. The simulation model represents post-synthesis gate-level netlist for the PR persona.

When using the PR simulation model for the persona, the netlist includes a new altera_sim_pr_activate top-level signal for the model. You can asynchronously drive this signal to load all registers in the model with X. Use this feature to verify the reset sequence of the new persona on PR event completion.

By default, the PR simulation model asynchronously loads X into the register storage element on pr_activate signal assertion. You can parametrize this behavior on a per-register basis, or on a simulation-wide default basis. The simulation model supports four built-in modes:
  • load X
  • load 1
  • load 0
  • load rand

Before running a simulation, generate the gate-level simulation models (that is, .vo files) for the personas. The design example includes the pr_sim/gen_pr_models.do script that automates this process for you.

The following high-level steps summarize the process that the script automates:

  1. Open the base revision of a PR project in Intel Quartus Prime Pro Edition, and then click Processing > Start > Start Analysis & Synthesis. Alternatively, run this command-line equivalent:
    quartus_syn <project name> -c <base revision name>
  2. After synthesis is complete, click Project > Export Design Partition, and then select the root partition for the Partition name, and select synthesized for the Snapshot. Click OK. Alternatively, run this command-line equivalent:
    quartus_cdb <project name> -c <base revision name> \
       "--export_block root_partition --snapshot synthesized \
       --file <static qdb name>         
  3. Click Project > Revisions and switch the current revision to that of the persona you want to export. Click Processing > Start > Start Analysis & Synthesis. Alternatively, run this command-line equivalent:
    quartus_syn <project name> -c <persona revision name>
  4. After synthesis of the persona revision completes, execute the following at the command line to generate the PR simulation model:
    quartus_eda <project name> –c <persona revision name> \
       "--pr–simulation --tool=questasim --format=verilog \
        --partition=<pr partition name> \
        --module=<partition name>=<persona module name>
  5. Repeat steps 3 and 4 for all the personas that you want to simulate.

The EDA Netlist Writer GUI does not support PR Mode. Use command line to generate post-synthesis gate-level PR simulation model for the personas.