2. Partial Reconfiguration Simulation Overview
The Quartus® Prime Pro Edition software supports simulation of partial reconfiguration (PR) persona transitions through use of simulation multiplexers. You use the simulation multiplexers to change which persona drives logic inside the PR region during simulation. The simulation multiplexers can also drive the output with unknown values (X) during partial reconfiguration. You can use these multiplexers to simulate random values exiting the PR region, and to identify potentially problematic data.
- RTL Simulation of Static and PR Regions
A simulation method similar to traditional RTL simulation, with the addition of simulation multiplexers. This method shows behavior of the static region during transitions. You can use RTL simulation to verify that unknown values exiting the PR region do not harm the static region functionality.
- PR Simulation with post-synthesis gate-level netlist (simulation model) of the persona
A slower simulation method that provides the additional capability to inject unknown values into the registers inside the PR region. The gate-level PR simulation model allows for accurate simulation of registers in your design. You can use this simulation method to verify of reset sequences and detect adverse initial conditions for PR.
Similar to non-PR design simulations, preparing for a PR simulation involves setting up your simulator working environment, compiling simulation model libraries, and running your simulation.