AN 1007: Partial Reconfiguration Design Simulation Tutorial

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ID 819958
Date 5/17/2024
Public
Document Table of Contents
Document Table of Contents x
1. Partial Reconfiguration Design Simulation Tutorial Introduction 2. Partial Reconfiguration Simulation Overview 3. Partial Reconfiguration Simulation Capabilities 4. Types of Verification Achievable Through Simulation 5. Partial Reconfiguration Simulation Requirements 6. Partial Reconfiguration Simulation Reference Design Requirements 7. Partial Reconfiguration Simulation Reference Design Overview 8. Partial Reconfiguration Simulation Reference Design Files 9. PR Simulation Reference Design Walkthrough 10. PR Simulation Results 11. Document Revision History for AN 1007: Partial Reconfiguration Design Simulation Tutorial
9. PR Simulation Reference Design Walkthrough x
9.1. Step 1: Getting Started 9.2. Step 2: Creating a Project Revision for PR Simulation 9.3. Step 3: Adding RTL Design Files to the pr_sim Revision 9.4. Step 4: Adding PR Simulation Design Files to the pr_sim Revision 9.5. Step 5: Generating Gate-level PR Simulation Models for the Persona 9.6. Step 6: Preparing the Setup Simulation Script 9.7. Step 7: Run PR Simulation
10. PR Simulation Results x
10.1. Persona Swapping Simulation 10.2. Reset Sequence Simulation 10.3. Persona using Post-Synthesis Gate-Level PR Simulation Model vs RTL
1. Partial Reconfiguration Design Simulation Tutorial Introduction
2. Partial Reconfiguration Simulation Overview
3. Partial Reconfiguration Simulation Capabilities
4. Types of Verification Achievable Through Simulation
5. Partial Reconfiguration Simulation Requirements
6. Partial Reconfiguration Simulation Reference Design Requirements
7. Partial Reconfiguration Simulation Reference Design Overview
8. Partial Reconfiguration Simulation Reference Design Files
9. PR Simulation Reference Design Walkthrough
10. PR Simulation Results
11. Document Revision History for AN 1007: Partial Reconfiguration Design Simulation Tutorial

9.1. Step 1: Getting Started

Begin the reference design walkthrough by setting up the working environment to create the PR simulation reference design:
  1. Create a /pr working directory in your system working environment.
  2. Copy one of the following tutorial folders for your FPGA device to you new /pr working directory:
    • tutorials/agilex5_pcie_devkit_pr_sim/pr
    • tutorials/agilex7_pcie_devkit_pr_sim/pr
    • tutorials/a10_pcie_devkit_pr_sim/pr
    • tutorials/s10_pcie_devkit_pr_sim/pr
  3. In the Quartus® Prime Pro Edition software, click File > Open Project and select the /pr/pr_sim.qpf project file.
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