AXI Multichannel DMA Intel® FPGA IP for PCI Express* User Guide

ID 817911
Date 4/07/2025
Public

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Document Table of Contents

2.2.1. Root Port Mode Features

  • Address Translation Table (ATT) support in BAS and BAM+BAS mode
  • Automatically enables Configuration Slave and Hard IP Reconfiguration interfaces
  • 10-bit tag support
  • Completion reordering
  • Completion timeout
  • User mode and supported user interface
    • Bursting Master
      • BAM AXI-MM master
      • Configuration Slave
      • Hard IP Reconfiguration
    • Bursting Slave
      • BAS AXI-MM slave
      • Configuration Slave
      • Hard IP Reconfiguration
    • BAM + BAS
      • BAM AXI-MM master
      • BAS AXI-MM slave
      • Configuration Slave
      • Hard IP Reconfiguration