AXI Multichannel DMA Intel® FPGA IP for PCI Express* User Guide

ID 817911
Date 4/07/2025
Public

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5.4.3. H2D/D2H AXI-MM Master

The MCDMA mode supports an AXI Memory-Mapped (AXI-MM) interface which can be selected in the IP Parameter Editor. The AXI-MM master interface consists of a single AXI interface, where the Write Channel is connected to the H2D DMA path and the Read Channel is connected to the D2H DMA path.