Low Latency Ethernet 10G MAC Intel® FPGA IP Design Example User Guide: Agilex™ 3 and Agilex™ 5 FPGAs and SoCs
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Visible to Intel only — GUID: jmd1709601506814
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3. 1G Ethernet Design Example with IEEE 1588v2 Feature
The 1G Ethernet design example with the IEEE 1588v2 feature demonstrates an Ethernet solution for Agilex™ 3 and Agilex™ 5 devices using the Low Latency Ethernet 10G MAC Intel® FPGA IP operating at 1G.
Generate the design example from the Example Design tab of the Low Latency Ethernet 10G MAC Intel® FPGA IP parameter editor.