Low Latency Ethernet 10G MAC Intel® FPGA IP Design Example User Guide: Agilex™ 3 and Agilex™ 5 FPGAs and SoCs
Visible to Intel only — GUID: ynm1724920953897
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Visible to Intel only — GUID: ynm1724920953897
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6. 10G Ethernet Design Example
The 10G Ethernet design example demonstrates an Ethernet solution for Agilex™ 3 and Agilex™ 5 devices using the Low Latency Ethernet 10G MAC Intel® FPGA IP operating at 10G.
Generate the design example from the Example Design tab of the Low Latency Ethernet 10G MAC Intel® FPGA IP parameter editor.