High Bandwidth Memory (HBM2E) Interface Agilex™ 7 M-Series FPGA IP Design Example User Guide

ID 773266
Date 4/29/2024
Document Table of Contents

2.8.3. Simulating the HBM2E FPGA IP with ModelSim SE

You can simulate your HBM2 EMIF IP using Mentor Graphics* ModelSim* software.
  1. Launch the Mentor Graphics* ModelSim* software and select File > Change Directory.
  2. Navigate to the <hbm_fp_0_example_design>/sim/ed_sim/mentor directory within the generated design example folder.
  3. Verify that the Transcript window is displayed at the bottom of the screen. If the Transcript window is not visible, display it by clicking View > Transcript.
  4. In the Transcript window, run source msim_setup.tcl. The simulation stops after the traffic generator test completes successfully.
  5. To generate simulation with detailed waveforms, rerun simulation by running ld_debug in the Transcript window.
  6. The Objects window displays the available signals from the design, once the ld_debug command has completed.
  7. In the Objects window, select the signals that you want to analyze in your simulation by right-clicking and selecting Add Wave.
  8. After you finish selecting the signals for simulation, execute run -all in the Transcript window. The simulation ends once the traffic generator test completes successfully.
Note: ModelSim* simulation of the HBM2E design example enabled with fabric NoC is supported only with the 2023 version of the ModelSim* software.