High Bandwidth Memory (HBM2E) Interface Agilex™ 7 M-Series FPGA IP Design Example User Guide

ID 773266
Date 4/29/2024
Document Table of Contents

2.4. Compiling and Programming the Agilex™ 7 M-Series High Bandwidth Memory (HBM2E) Interface FPGA IP Design Example

Follow these steps to compile and program the design example in the Quartus® Prime software.
  1. To open the design example, click File > Open project, and navigate to the Quartus® Prime Pro Edition folder containing the design example directory, such as <project_directory>/<example_design_directory>/qii/ed_synth.qpf , and click Open.
  2. You can make the necessary pin assignments in the .qsf file or in the Pin Planner.
    (Refer to Top-Level Signals of the HBM2E Design Example for details on the reset and reference clock signals that require pin assignments.)
  3. To begin compilation, click Processing > Start Compilation. The successful completion of compilation generates a .sof file, which enables the design to run on hardware.
  4. To program your device with the compiled design, open the programmer by clicking Tools > Programmer.
  5. In the programmer, click Auto Detect to detect supported devices.
  6. Select the Agilex™ 7 M-series device and then select Change File.
  7. Navigate to the generated ed_synth.sof file and click Open.
  8. Click Start to begin programming the Agilex™ 7 M-series device. When the device is successfully programmed, the progress bar at the top-right of the window should indicate 100% (Successful).
For related information, refer to Modifying Your Pin Assignments to Choose the Physical Location of the HBM2E Device in the High Bandwidth Memory (HBM2E) Interface Agilex™ 7 M-Series FPGA IP User Guide.