Parameterizable Macros for Intel® FPGAs User Guide

ID 772350
Date 10/02/2023

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6.6. Bus Synchronizer Parameterizable Macro (ipm_cdc_bus_sync)

The bus synchronizer parameterizable macro (ipm_cdc_bus_sync) uses handshake signaling to transfer an input bus from the source clock domain to the destination clock domain. This macro uses a request (req) and acknowledgment (ack) mechanism to safely transfer a bus of data across the clock domains. For this macro to function correctly, a full handshake (an acknowledgment that the data transfer was received and a resetting of the handshake signals) must complete before another data transfer initiates.

Figure 12. Bus Synchronizer Parameterizable Macro Block Diagram

Figure 13. Bus Synchronizer Parameterizable Macro Waveform