MACsec Intel FPGA System Design User Guide

ID 767516
Date 6/26/2023
Public

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7.6. Complete Simulation Command

The following commands provide the entire syntax in order to run a simulation:

sh run_sim.sh -t <test_case_name> -g <0/1> -m <0/1> -d "+define+macro1 +define+macro2 +define+macro3"

Examples of this syntax for specific tests are shown below:
  1. For E-TILE design simulation (PCIe Gen4x16)
    • 25G E-tile design, QSFP loopback, without VPD dump enable

      sh run_sim.sh -t basicCSRTest -g 1 -c 1 -m 0 -d "+define+PCIE_USR_DATA_WIDTH_X16 +define+ENABLE_ETILE_ETH +define+MAC_SRD_CFG_25G +define+QSFP_EXTERNAL_LOOPBACK"

    • 100G E-tile, MACSEC level Loopback, with VPD dump enable

      sh run_sim.sh -t basicCSRTest -g 1 -m 1 -d "+define+PCIE_USR_DATA_WIDTH_X16 +define+ENABLE_ETILE_ETH"

  2. For F-TILE design simulation (PCIe Gen4x8)
    • 25G F-tile design, QSFP loopback, without VPD dump enable

      sh run_sim.sh -t basicCSRTest -g 1 -c 1 -m 0 -d "+define+ENABLE_FTILE_ETH +define+MAC_SRD_CFG_25G +define+QSFP_EXTERNAL_LOOPBACK"

    • 100G F-tile design, QSFP loopback, with VPD dump enable

      sh run_sim.sh -t basicCSRTest -g 1 -c 1 -m 1 -d "+define+ENABLE_FTILE_ETH +define+QSFP_EXTERNAL_LOOPBACK"

    • 100G F-tile design, MACSEC level loopback, with VPD dump enable

      sh run_sim.sh -t basicCSRTest -g 1 -c 1 -m 1 -d "+define+ENABLE_FTILE_ETH"