MACsec Intel FPGA System Design User Guide

ID 767516
Date 3/03/2023

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Document Table of Contents Design Overview

The diagram below shows the configuration and design overview of the FPGA debug tools with respect to the HPS and Host.
Figure 44. Configuration and Software Stack for Debug tool

Debug CLI : This contains debug applications as mentioned above in the feature overview.

MACsec IP driver: In case of the host example design, the read write calls are taken care by the McDMA driver and for the HPS design. The MACsec IP Driver is directly written into the HW.

Hardware FPGA: The MACsec IP in the FPGA and HW Crypto.

Below are the commands used for testing:

Cmd: ./cli_macsec sa-sc-tx-stat-encr-pckt -p 1 -c 1 -a 3 -w 0x01


p = port, c = secure channel, a = secure association, o = offset, w = write


cmd mapped to macsec_get_set_sa_attribute

Communicating over netlink socket

CMD mapped with attr: 40

Bytes written: 64

Device says: port 1 sc 1 sa 3 cmd 40 val 0x1

SUCCESS for attr: sa-sc-tx-stat-encr-pckt port: 1 sc: 1 sa: 3

The command sa-sc-tx-stat-encr-pckt is defined in command_list_file.txt with the following rule.

sa-sc-tx-stat-encr-pckt ATTR_T_UINT32 MACSEC_SC_SA_TX_STAT_ENCR_PCKT 40

You can add new commands by appending to the command_list_file.txt. The same command has to be checked in the cli_MACsec infrastructure. Similarly, a script can be used to run multiple commands in order. For example,

sh -p=1 -c=1 -a=3 -o=0xff2f -w=0x01