MACsec Intel FPGA System Design User Guide

ID 767516
Date 3/03/2023

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Document Table of Contents Data Transmitting from E/F-tile Hard IP to MACsec

The E/F-Tile Hard IP’s MAC receives data from PHY and transfers it over the AVST interface. The AVST to AXI-ST conversion logic converts RX MAC data to AXI-ST before giving it to MACsec IP.
Figure 8. Timing Diagram for Packet Transmitting from E/F-Tile Hard IP to MACsec

The figure above shows RX MAC client interface receives data.