Visible to Intel only — GUID: amj1674087181747
Ixiasoft
Visible to Intel only — GUID: amj1674087181747
Ixiasoft
7.6. Complete Simulation Command
The following commands provide the entire syntax in order to run a simulation:
sh run_sim.sh -t <test_case_name> -g <0/1> -b <0/1> -m <0/1> -d "+define+macro1 +define+macro2 +define+macro3"
- For E-TILE design simulation (PCIe Gen4x16)
- 25G E-tile design, QSFP loopback, without VPD dump enable
sh run_sim.sh -t basicCSRTest -g 1 -c 1 -b 0 -m 0 -d "+define+PCIE_USR_DATA_WIDTH_X16 +define+ENABLE_ETILE_ETH +define+MAC_SRD_CFG_25G +define+QSFP_EXTERNAL_LOOPBACK"
- 25G E-tile design, QSFP loopback, with RP_BFM
sh run_sim.sh -t basicCSRTest -g 1 -c 1 -b 1 -m 0 -d "+define+PCIE_USR_DATA_WIDTH_X16 +define+ENABLE_ETILE_ETH +define+MAC_SRD_CFG_25G +define+QSFP_EXTERNAL_LOOPBACK"
- 100G E-tile, MACSEC level Loopback, with VPD dump enable
sh run_sim.sh -t basicCSRTest -g 1 -b 0 -m 1 -d "+define+PCIE_USR_DATA_WIDTH_X16 +define+ENABLE_ETILE_ETH"
- 25G E-tile design, QSFP loopback, without VPD dump enable
- For F-TILE design simulation (PCIe Gen4x8)
- 25G F-tile design, QSFP loopback, without VPD dump enable
sh run_sim.sh -t basicCSRTest -g 1 -c 1 -b 0 -m 0 -d "+define+ENABLE_FTILE_ETH +define+MAC_SRD_CFG_25G +define+QSFP_EXTERNAL_LOOPBACK"
- 100G F-tile design, QSFP loopback, with VPD dump enable
sh run_sim.sh -t basicCSRTest -g 1 -c 1 -b 0 -m 1 -d "+define+ENABLE_FTILE_ETH +define+QSFP_EXTERNAL_LOOPBACK"
- 100G F-tile design, MACSEC level loopback, with VPD dump enable
sh run_sim.sh -t basicCSRTest -g 1 -c 1 -b 0 -m 1 -d "+define+ENABLE_FTILE_ETH"
- 25G F-tile design, QSFP loopback, without VPD dump enable