MACsec Intel FPGA System Design User Guide

ID 767516
Date 3/03/2023

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Document Table of Contents

2.3.1. AXI-ST Multi-Segment to Single-Segment Conversion

Each MACsec’s RX uncontrolled port dynamically gives data in multi-segment format (where a new packet can start in the same cycle that the current packet ends in) whenever the data is available to be combined from the same port. The packet parser/filtering logic works in single segment format and looks for an Ethernet type field at a fixed location within the packet after SA+DA (Source, Destination MAC Addresses). The uncontrolled port receives plaintext as well as ciphertext packets too so there should not be any back pressure from your logic while converting multi-segment to single segment to maintain the equal incoming and outgoing rate. The uncontrolled port does not support TREADY de-assertion.
Figure 15. AXI-ST Multi-Segment Stream Data from Uncontrolled Port
As shown below, short packets may introduce an additional cycle to transfer the same amount of data coming in multi-segment mode. Your implementation should try to match the incoming rate by minimizing the unrequired throttling.
Figure 16. AXI-ST Single-Segment Stream Data (Converted)