MACsec Intel® FPGA IP User Guide

ID 736108
Date 10/02/2023
Public

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1.5. Device Speed Grade Support and Theoretical Throughput

The following table shows the theoretical throughput which can be achieved with the maximum AXI-ST clock frequencies in different device fabric speed grades.
Table 5.   Theoretical Throughput as a Function of AXI-ST Clock Frequency
Fabric Speed Grade

AXI-ST Fmax

Theoretical Throughput
-1 425Mhz 212Gbps
-2 400Mhz 200Gbps
-3 370Mhz 185Gbps