Nios® V Embedded Processor Design Handbook

ID 726952
Date 10/02/2023

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Document Table of Contents

7.3. Nios® V Processor RSU Quick Start Guide in SDM-based Devices

You can perform the remote system update in the SDM-based devices using the Nios® V processor system. The example demonstrates the following operations:

Table 42.  Remote System Update Example using Nios® V Processor System
Operation Supported Image
Creating the flash images
  • Initial RSU image (containing bitstreams for factory and application image)
  • Application update image
  • Factory update image
Reconfiguring the FPGA device
  • Factory image
  • Application image
Updating the RSU flash image
  • Factory update image
  • Application update image

The block diagram below shows the processor system along with the configuration QSPI flash layout. Intel builds the system using the Intel® Stratix® 10 SX SoC L-Tile development kit. The Nios® V processor boots the processor software from the memory-initialized on-chip memory.

Figure 112. Remote System Update Example Design

In a normal RSU use case, each image can be unique and performs different functions. The initial RSU JIC image contains the factory image and application image, while the update images are generated as .rpd file.

The Nios® V processor system is incapable of performing the device reconfiguration directly with both update images because they are not registered within the initial RSU image. To perform the RSU image update, the processor reads and writes the update images into the initial RSU image and then initiates the device reconfiguration.
Note: Besides storing the updated images in a non-volatile flash, they can be transferred to the processor system through a network.