Nios® V Embedded Processor Design Handbook

ID 726952
Date 10/02/2023

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Document Table of Contents

1.5.4. Programming Nios® V into the FPGA Device

To program Nios® V processor based system into the FPGA and to run your application, use Intel Quartus Programmer tool.

  1. To create the Nios® V processor inside the FPGA device, download the .sof file onto the board with the following command.
    quartus_pgm -c 1 -m JTAG -o p;hw/output_files/top.sof@1
    quartus_pgm -c 1 -m JTAG -o p\;hw/output_files/top.sof@1
    • -c 1 is referring to cable number connected to the Host Computer.
    • @1 is referring to device index on the JTAG Chain and may differ for your board.
  2. To run the Hello World application program, reset the Nios® V processor system using the toggle_issp.tcl script.
    quartus_stp -t scripts/toggle_issp.tcl
  3. Download the .elf using the niosv-download command.
    niosv-download <elf file>
    Note: Set the Enable Debug option during configuration in Platform Designer to use niosv-download command.
  4. Use the JTAG UART terminal to print the stdout and stderr of the Nios® V processor system.
  5. The Hello World application displays as shown in the following figures.
    Figure 6. Output of the Hello World application using hello.c
    Figure 7. Output of the Hello World application using hello_ucosii.c