A newer version of this document is available. Customers should click here to go to the newest version.
1. About the Nios® V Embedded Processor
2. Nios® V Processor Hardware System Design with Intel® Quartus® Prime Software and Platform Designer
3. Nios® V Processor Software System Design
4. Nios® V Processor Configuration and Booting Solutions
5. Nios® V Processor - Using the MicroC/TCP-IP Stack
6. Nios® V Processor Debugging, Verifying, and Simulating
7. Nios® V Processor — Remote System Update
8. Nios® V Processor — Using Custom Instruction
9. Nios® V Embedded Processor Design Handbook Archives
10. Document Revision History for the Nios® V Embedded Processor Design Handbook
4.1. Introduction
4.2. Linking Applications
4.3. Nios® V Processor Booting Methods
4.4. Introduction to Nios® V Processor Booting Methods
4.5. Nios® V Processor Booting from Configuration QSPI Flash
4.6. Nios® V Processor Booting from On-Chip Memory (OCRAM)
4.7. Nios® V Processor Booting from Tightly Coupled Memory (TCM)
4.8. Summary of Nios® V Processor Vector Configuration and BSP Settings
6.5.1. Prerequisites
6.5.2. Setting Up and Generating Your Simulation Environment in Platform Designer
6.5.3. Creating Nios V Processor Software
6.5.4. Generating Memory Initialization File
6.5.5. Generating System Simulation Files
6.5.6. Running Simulation in the QuestaSim Simulator Using Command Line
4.2.1.1. Default BSP Linking
During BSP configuration, the tools perform the following steps automatically:
- Assign memory region names: Assign a name to each system memory device and add each name to the linker file as a memory region.
- Find largest memory: Identify the largest read-and-write memory region in the linker file.
- Assign linker sections: Place the default linker sections (.text, .rodata, .rwdata, .bss, .heap, and .stack) in the memory region identified in the previous step.
- Write files: Write the linker.x and linker.h files.
Typically, the linker section allocation scheme works during the software development process because the application is guaranteed to function if the memory is large enough.
The rules for the default linking behavior are contained in the Intel-generated Tcl scripts bsp-set-defaults.tcl and bsp-linker-utils.tcl found in the <Intel Quartus Prime installation directory>/niosv/scripts/bsp-defaults directory. The niosv-bsp command invokes these scripts. Do not modify these scripts directly.