F-Tile Architecture and PMA and FEC Direct PHY IP User Guide

ID 683872
Date 4/01/2024
Document Table of Contents

7.4.3. Ethernet Subsystem Intel FPGA IP

For the Ethernet Subsystem Intel FPGA IP, the steps are similar to the F-Tile Ethernet Multirate Intel FPGA IP, just that there are multiple copies of the Ethernet Subsystem. Each of these copies are connected to a particular port.

You can follow the steps below to configure the Transceiver Toolkit for the Ethernet Subsystem Intel FPGA IP:
  1. Select the port number from the Select Port drop-down list in the Toolkit Parameters tab as shown in the following figure. You have to do this only once upon opening the Transceiver Toolkit.
    Figure 147. Toolkit Parameters for the Ethernet Subsystem Intel FPGA IP
  2. Perform dynamic reconfiguration in your design.
  3. Click the Reinitialize Toolkit Post Reconfiguration button.

Once you complete step 1 above, then you can repeat steps 2 and 3 without having to perform step 1 again.