Visible to Intel only — GUID: kix1467145031981
Ixiasoft
Visible to Intel only — GUID: kix1467145031981
Ixiasoft
2.6.1. Step 1: Identify Partial Reconfiguration Resources
All periphery resources, such as transceivers, external memory interfaces, GPIOs, I/O receivers, and the hard processor system (HPS), must be in the static region. Partial reconfiguration of global network buffers for clocks and resets is not possible.
Hardware Resource Block | Reconfiguration Method |
---|---|
Logic Block | Partial reconfiguration |
Digital Signal Processing | Partial reconfiguration |
Memory Block | Partial reconfiguration |
Core Routing | Partial reconfiguration |
Transceivers/PLL | Dynamic reconfiguration |
I/O Blocks | Not supported |
Clock Control Blocks | Not supported |
After identifying the resources for PR, set up the design hierarchy and source code to support this partitioning. Refer to Partial Reconfiguration Design Considerations.
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