Intel® Quartus® Prime Pro Edition User Guide: Partial Reconfiguration

ID 683834
Date 4/03/2023
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

3.4.1. Parameters

The Partial Reconfiguration External Configuration Controller Intel® FPGA IP supports customization of the following parameters.

Table 33.   Partial Reconfiguration External Configuration Controller Parameter Settings

Parameter

Value

Description

Enable Busy Interface

On/Off

Allows you to Enable or Disable the Busy interface, which asserts a signal to indicate that PR processing is in progress during external configuration. Default setting is Off.
Figure 64. Parameter Editor

Did you find the information on this page useful?

Characters remaining:

Feedback Message