Multi Channel DMA Intel® FPGA IP for PCI Express* User Guide

ID 683821
Date 1/29/2024
Document Table of Contents

6.2.4. PCIe0 PCI Express / PCI Capabilities

This group of parameters defines various capability properties of the IP core. Some of these parameters are stored in the PCI Configuration Space - PCI Compatible Configuration Space. The byte offset indicates the parameter address.
Figure 34. PCIe0 PCI Express / PCI Capabilities Parameters