Intel® Quartus® Prime Pro Edition User Guide: Debug Tools

ID 683819
Date 10/02/2023

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Document Table of Contents Reducing Signal Tap Device Resources

If your design has resource constraints, follow these tips to reduce the logic or memory the Signal Tap logic analyzer requires:
  • Disable runtime configurable options—disabling runtime configurability for advanced trigger conditions or runtime configurable options in the State-based triggering flow results in fewer LEs.
  • Minimize the number of segments in the acquisition buffer—you can reduce the logic resources that the Signal Tap logic analyzer requires if you limit the segments in your sampling buffer.
  • Disable the Data Enable for signals that you use only for triggering—by default, the Signal Tap logic analyzer enables data enable options for all signals. Turning off the data enable option for signals you use only as trigger inputs saves memory resources.