F-Tile Ethernet Intel® FPGA Hard IP Design Example User Guide

ID 683804
Date 12/19/2022

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1.3.2. Fast Sim Model for FHT Variants

To provide a reduction in a real-time simulation duration, you can utilize a Fast Sim model in your design example testbench. For FHT variants, the model is enabled by a macro in the simulation run script.
To enable the Fast Sim model, add the following macro to your simulation run script:
Note: The design example simulation script does not enable the macro by default. You need to manually add the macro.

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