Intel® FPGA Voltage Sensor IP Core User Guide

ID 683781
Date 2/09/2018
Document Table of Contents Continuous Conversion

When you set the RUN bit, conversion starts with the defined sequence (based on the setting of the MD bits) and when a conversion is complete, the conversion repeats the same set of conversion again. For example, if you choose the sequence for Channel 0 to Channel 7, the IP block restarts the whole sequence when the Channel 7 sample is complete. For a single channel read (MD = 2'b11), the IP block reads the value from that channel until the RUN bit is cleared. In this continuous conversion mode, the software clears the RUN bit.

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