Intel® Agilex™ 7 General-Purpose I/O User Guide: F-Series and I-Series

ID 683780
Date 2/20/2023

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents Single Data Rate Input Register

Figure 42. Single Data Rate Input Register

Table 53.  Single Data Rate Input Register .sdc Command Examples
Command Command Example Description
create_clock create_clock -name sdr_in_clk -period "100 MHz" sdr_in_clk Creates clock setting for the input clock.
set_input_delay set_input_delay -clock sdr_in_clk 0.15 sdr_in_data Instructs the Timing Analyzer to analyze the timing of the input I/O with a 0.15 ns input delay.